Microchip Technology /ATSAME51J20A /SystemControl /SCR

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Interpret as SCR

31 2827 2423 2019 1615 1211 87 43 0 0 0 0 0 0 0 0 00 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 (VALUE_0)SLEEPONEXIT 0 (VALUE_0)SLEEPDEEP 0 (VALUE_0)SEVONPEND

SLEEPDEEP=VALUE_0, SLEEPONEXIT=VALUE_0, SEVONPEND=VALUE_0

Description

System Control Register

Fields

SLEEPONEXIT

Sleep-on-exit on handler return

0 (VALUE_0): Do not sleep when returning to Thread mode

1 (VALUE_1): Enter sleep, or deep sleep, on return from an ISR

SLEEPDEEP

Deep Sleep used as low power mode

0 (VALUE_0): Sleep

1 (VALUE_1): Deep sleep

SEVONPEND

Send Event on Pending bit

0 (VALUE_0): Only enabled interrupts or events can wakeup the processor, disabled interrupts are excluded

1 (VALUE_1): Enabled events and all interrupts, including disabled interrupts, can wakeup the processor

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